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Power Factor Controller
IC for High Power Factor and Active Harmonic Filtering Advance Information Features IC for sinusoidal line-current consumption Power factor approaching 1 Controls boost converter as an active harmonics filter Direct drive of SIPMOS transistor Zero crossing detector for discontinuous operation mode with variable frequency q 110/220 V AC operation without switchover q Standby current consumption of 0.5 mA
q q q q q
TDA 4817
Bipolar IC
P-DIP-8-1
P-DSO-8-1
Type w TDA 4817 w TDA 4817 G w = New type
Ordering Code Q67000-A8298 Q67000-A8299
Package P-DIP-8-1 P-DSO-8-1 (SMD)
The TDA 4817 contains all functions for designing electronic ballasts and switched-mode power supplies with sinusoidal line current consumption and a power factor approaching 1. The TDA 4817 controls a boost converter as an active harmonic filter in a discontinuous (triangular shaped current) mode with variable frequency. A typical application is in electronic ballasts, especially when a large number of such lamps are concentrated on one line supply point. The output voltage of this filter is regulated with high efficiency. Therefore the device can be easily operated on different line voltages (110/220 VAC) without any switchover. The TDA 4817 is an 8-pin-economy-version of the TDA 4814 A without reference voltage output and start/stop monitoring circuit.
Semiconductor Group
1
05.95
TDA 4817
TDA 4817
TDA 4817 G
Pin Configurations (top view)
Pin Definitions and Functions Pin 1 2 3 4 5 6 7 8 Symbol GND QSIP Function Ground Driver output Supply voltage Comparator input Multiplier input Input Operational-amplifier output QOP and multiplier input M2 Detector input
VS
C- IM1 OP - QOP/IM2 I Detector
Semiconductor Group
2
TDA 4817
Block Diagram
Semiconductor Group
3
TDA 4817
Circuit Description This device has a conditioning circuit for the internal power supply. It allows standby operation with very low current consumption (less than 0.5 mA), a hysteresis between enable and switch-off levels and an internal voltage stabilization. An integrated Z-diode limits the voltage on VS, when impressed current is fed. The output driver (Q SIP) is controlled by detector input and current comparator. The detector input (I DET) which is highly resistive in the operating state reacts on hysteresisdetermined voltage levels. To keep down the amount of circuitry required, clamping diodes are provided which allow control by a current source. The operating state of the boost converter choke is sensed via the detector input. H-level means that the choke discharges and the output driver is inhibited. H-level sets a flip-flop, which stores the switch-off instruction of the current comparator to reduce susceptibility to interference. As soon as demagnetization is finished the choke voltage reverses and the detector input is set to L-level, thus enabling the output driver. This ensures that the choke is always currentless when the SIPMOS transistor switches on and that no current gaps appear. The nominal voltage of the multiplier output is compared to the voltage derived from the actual line current (- I COMP), thus setting the switch-off threshold of the comparator. The current comparator blocks the output driver when the nominal peak value of the choke current given by the multiplier output is reached. This state is maintained in the flip-flop until H-level appears at detector input which takes over the hold function and resets the flip-flop. Operating states might occur without any useful detector signal. This is the case with magnetic saturation of the choke and when the input voltage approaches or exceeds the output voltage as, for example, during switch-on. The driver remains inhibited for the flip-flop due to the absent set signal. The trigger signal can be derived from the subsequent lamp generator or a SMPS control device. The trigger signal level should be so low that with standard operation the signal from the detector winding dominates. The multiplier delivers the preset nominal value for the current comparator by multiplying the input voltage (IM1), which determines the nominal waveform and the output voltage of the control amplifier. The control amplifier stabilizes the output dc voltage of the active harmonic filter in the event of load and input voltage changes. The control amplifier compares the actual output voltage to a reference voltage which is provided in the IC and stable with temperature. Output Driver The output driver is intended to drive a SIPMOS transistor directly. It is designed as a push-pull stage. Both the capacitive input impedance and keeping the gate level at zero potential in standby operation by an internal 10-k-resistor are taken into account. Possible effects on the output driver by line inductances or capacitive couplings via SIPMOS transistor Miller capacitance are limited by diodes connected to ground and supply voltage.
Semiconductor Group
4
TDA 4817
Absolute Maximum Ratings Parameter Supply voltage Inputs Comparator Operational amplifier Multiplier Output OP Z-current VS-GND Driver output QSIP QSIP clamping diodes Detector input Detector clamping diodes Junction temperature Storage temperature Thermal resistance system-air TDA 4817 TDA 4817 G Operating Range Supply voltage Z-current Driver current Ambient temperature Symbol min. Limit Values typ. max. - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 0 - 0.3 - 10 0.9 - 10 Unit V V V V V mA V mA V mA C C K/W K/W P-DIP-8 package P-DSO-8 package Observe P max Remarks
VS VC - VOP - VM1 VQOP IZ VQSIP IQSIP VDet IDet Tj Tstg R th SA R th SA
VZ
20 20 20 6 100
VZ = Z-voltage
VS
10 6 10 150
VQSIP > VS or VQSIP < - 0.3 V VDet > 6 V or VDet < 0.9 V
- 55
125 100 170
VS IZ IQSIP TA
VSon
0 - 500 - 25
VZ
100 500 85
V mA mA C
1)
Observe Pmax Observe Pmax
Semiconductor Group
5
TDA 4817
Characteristics VSON < VS < VZ; TA = - 25 to 85 C Parameter Current Consumption Without load on driver (QSIP) and VREF ; QSIP low Load on QSIP with SIPMOS gate; dynamic operation Symbol min. Limit Values typ. max. Unit Test Condition
IS IS IS
5
0.5 10 15
mA mA mA
0 V < VS < VSON VSON < VS < VZ VS = 12 V; fswitch = 50 kHz; load QSIP = 10 nF
Hysteresis on VS Turn-ON threshold for VS rising Switching hysteresis Comparator Input offset voltage Input current Common-mode input voltage Operational Amplifier Open-loop voltage gain Input offset voltage Input current Common-mode input voltage Output current Output voltage Gain-bandwidth product Transition phase Voltage Feedback Threshold
VSH VShy VIO - II VICM GVO VIO - II VIC IQ VQ fr
T
9.6 1.0 - 10
10.4
11.2 1.7 10 2 3.5
V V mV A V dB mV A V mA V MHz deg V
0 60 - 10 80
10 2 3.5 1.5 4 2 120
0 -3 1.2
VFB
VFB/T
1.96
2
2.04
Tj = 25 C
Pin 6 connected to Pin 7
Temperature response Output Driver H-output voltage L-output voltage Output current rising edge falling edge
- 0.3 5 200 250 300 350
0.3
mV/K V V mA mA
VQSIPH VQSIPL - IQSIP IQSIP
1 400 450
IQSIP = - 10 mA IQSIP = 10 mA CL = 10 nF CL = 10 nF
Semiconductor Group
6
TDA 4817
Characteristics (cont'd) VSON < VS < VZ; TA = - 25 to 85 C Parameter Z-Diode (VS) Z-voltage (observe Pmax) Multiplier Quadrant for input voltages Input voltage M1 Reference level for M1 Input voltage M2 Reference level for M2 Input current M1, M2 Max. output voltage Multiplier gain Multiplier gain Temperature response of coefficient Delay Times Input comparator-QSIP Detector Upper switching voltage for voltage rising (H) Lower switching voltage for voltage falling (L) Input current Clamping-diode level positive negative Switching hysteresis I. qu V V VREF + 1 V V 2 A V 0.72 V- 1 0.77 V- 1 0.1 %/K 2 0 Symbol min. Limit Values typ. 15.5 max. 17 V Unit Test Condition
VZ
13
IZ = 200 mA
VM1 VREF M1 VM2 VREF M2
- II
0
VREF VREF
0 0.62 0.55 - 0.3 1.6 0.67 - 0.1
VQM max CQ25 CQ
Tj = 25 C 1)
1)
TC/CQ
tI
500
700
ns
2)
VDetH VDetL - IDet VDet + VDet - VDethy
1.0 0.95
1.3
1.6
V V A V
10 6.9 0.6 50 300
0.9 V < VDet < 6 V
IDet = 3 mA IDet = 3 mA
mV
Calculation of output voltage VQM: VQM = C x VM1 x VM2 in V.
1) VM1 = 1 V
VM2 = VREF + 1 V
2) Step function on comparator input VComp from - 100 mV to + 100 mV.
Semiconductor Group
7
TDA 4817
Multiplier Characteristics
Semiconductor Group
8
TDA 4817
Discontinuous Operation Mode with Variable Frequency
The TDA 4817 works in a discontinuous operation mode with variable frequency. The principle of a freely oscillating controller exploits the physical relationship between current and voltage at the boost converter choke. The current in the semiconductors flows in a triangular shape. This is only when the current in the boost converter diode has gone to zero that the transistor goes conductive. This arrangement does away with the diode's power-squandering reverse currents. If triangular currents flow continuously through the boost converter choke the input current averaged over a high-frequency period is exactly half the peak of the high-frequency choke current. If the peak values of the choke current are located along an envelope curve that is proportional to a sinusoidal low- frequency input voltage, the input current available after smoothing in an RFI filter is sinusoidal.
Semiconductor Group
9
TDA 4817
Application Circuit: Electronic Ballast
Semiconductor Group
10
TDA 4817
The TDA 4817 controls a boost converter as an active harmonic filter, drawing a sinusoidal line current and providing a regulated DC voltage at the converter output. The active harmonic filter improves the power factor in electronic ballasts for fluorescent lamps and in switched-mode power supplies, reducing the harmonic content of the incoming, non rectified mains current and if suitably dimensioned permitting operation at input voltages between 90 V and 270 V. Benefits of TDA 4817 in Electronic Ballasts and SMPS
q Sinusoidal line current consumption q Power factor approaching 1 increases the power available from the AC line by more than 35 %
compared to conventional rectifier circuits. Circuit breakers and connectors become more reliable because of the lower peak currents.
q Active harmonic filtering reduces harmonic content in line current to meet VDE/IEC/EN-
standards.
q Wide-range power supplies are easier to implement for AC input voltages of 90 to 250 V without
switch-over.
q Preregulated DC output voltage provides optimal operating conditions for a subsequent
converter.
q Reduced smoothing capacitance:
For a given amplitude of the 100/120 Hz ripple voltage the smoothing capacitance can be reduced by 50 % in comparison to a conventional rectifier circuit. Reduced choke size: Rectifier circuits capable of more than 200 W usually employ chokes to decrease the charging current ot the capacitor. These chokes are larger than those used in a preregulator with powerfactor control.
q Higher efficiency:
A preregulator does cause some additional losses, but these are more than compensated for by the cut in losses created by the rectifier configuration and the optimum operating conditions that are produced for a subsequent converter, even in the event of supply-voltage fluctuations.
Semiconductor Group
11
TDA 4817
Summary of Effects of DC-Voltage Preregulation with Power-Factor Control Parameter Conventional Power Rectification Power Rectification with Preregulator and Power-Factor Control 340 V 350 V 330 V 0.7 2.06
Mean DC supply voltage Maximum DC supply voltage with line overvoltage Minimurn DC supply voltage with line undervoltage
280 V 350 V 230 V
Relative reverse voltage of diodes with line overvoltage 1 Relative forward resistance of SIPMOS transistors with 1 sustained conducting-state power loss and line undervoltage Relative forward resistance of SIPMOS transistors with 1 sustained conducting-state power loss and rated supply voltage Relative input capacitance with sustained ripple voltage 1 Power factor 0.5 to 0.7
1.74
0.3 to 0.5 0.99
Semiconductor Group
12

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